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Message-ID: <alpine.LFD.2.00.0904181151230.4042@localhost.localdomain>
Date:	Sat, 18 Apr 2009 11:57:53 -0700 (PDT)
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Ingo Molnar <mingo@...e.hu>
cc:	Yinghai Lu <yinghai@...nel.org>,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	"H. Peter Anvin" <hpa@...or.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	linux-pci@...r.kernel.org, yannick.roehlly@...e.fr
Subject: Re: [PATCH] x86/pci: make pci_mem_start to be aligned only -v4



On Sat, 18 Apr 2009, Ingo Molnar wrote:
> 
> Am i missing something?

We also try to avoid random motherboard resources etc that aren't reserved 
or documented by the BIOS. It's better to go into big holes. It's also 
better to try to keep as close to the old (tested) behavior.

Now, admittedly those undocumented resources are _much_ more common in IO 
space, but still. They're _very_ common. Om my modern Nehalem thing with 
an Intel BIOS (supposedly "good" and not from some random manufacturer), I 
have, for example:

[   26.533771] pci 0000:00:1f.0: ICH7 LPC Generic IO decode 2 PIO at 0810 (mask 007f)

byt that one isn't covered by any PnP range or anythign else.

[ Now, it's possible that it's bogus: "0x810" has a bit set in the same 
  bits that cover the mask, and I don't know if the mask is a "ignore 
  these bits" (and the range would thus match all of 0x0800-0x087f) or if 
  the mast is a "port & ~mask == base" in which case nothing would ever 
  match.

  But I _think_ the BIOS literally set up something to answer int he 
  0x08?? range, and didn't document it anywhere. The same can be true of 
  MMIO too, and so we should try to avoid using random memory areas if we 
  can ]

			Linus

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