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Message-ID: <49EBD934.4070909@gmail.com>
Date: Sun, 19 Apr 2009 20:08:52 -0600
From: Robert Hancock <hancockrwd@...il.com>
To: Roland Dreier <rdreier@...co.com>
CC: Ingo Molnar <mingo@...e.hu>, "H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
"Robert P. J. Day" <rpjday@...shcourse.ca>,
Hitoshi Mitake <h.mitake@...il.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: arch/x86/Kconfig selects invalid HAVE_READQ, HAVE_WRITEQ vars
Roland Dreier wrote:
> > Also, atomicity might not be possible to guarantee on the bus level:
> > say the device sits on a 32-bit PCI bus. (No matter what instruction
> > the CPU gets, a readq/writeq there has to be done as two 32-bit bus
> > accesses.)
>
> Well, the conventional PCI devices I know of with 64-bit registers were
> PCI-X cards, keyed so they would only fit into a 64-bit slot. And of
> course there is no such thing as 32-bit PCI Express.
It's quite possible to use most 64-bit PCI-X cards in a 32-bit slot,
with the 64-bit part of the card not plugged into anything. It's
supposed to work (as long as the card can handle the voltage the slot uses).
--
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