linux-kernel - Re: [PATCH] fsldma: use PCI Read Multiple command

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Message-ID: <49F611C4.2030704@ovro.caltech.edu>
Date:	Mon, 27 Apr 2009 13:12:52 -0700
From:	David Hawkins <dwh@...o.caltech.edu>
To:	Kumar Gala <galak@...nel.crashing.org>
CC:	Ira Snyder <iws@...o.caltech.edu>,
	Liu Dave-R63238 <DaveLiu@...escale.com>,
	linux-kernel@...r.kernel.org, linuxppc-dev@...abs.org,
	Dan Williams <dan.j.williams@...el.com>,
	Timur Tabi <timur@...escale.com>
Subject: Re: [PATCH] fsldma: use PCI Read Multiple command


>>>> Can you give me an example of non-PCI memory that would be
>>>> non-prefetchable that you'd like us to try? We can see if our
>>>> host CPUs have an area like that ... we just need to know
>>>> what device to look for first :)
>>> You can mark the pci inbound window on the 83xx as non-prefetchable 
>>> (assuming 83xx is host). On a x86 host I doubt there is any easy way 
>>> to get non-prefetchable memory.
>>
>> Yep, we were going to do that, but chose to use the
>> 1MB region already setup for the IMMRs since its already
>> marked as non-prefetchable. We were only doing reads, so
>> it wasn't going to hurt anything.
>>
>> I doubt that marking one of the other BAR regions
>> as non-prefetchable will give a different result.
>> However, we're more than happy to double-check if
>> you'd like.
> 
> Its possible you'll get a different result since IMMR is a register 
> space internal and thats normally a completely different bus than memory 
> would be (internal to the 83xx).  I'd suggest double-checking w/a BAR 
> marked non-prefetch pointing to real memory.

We had a 4k BAR1 setup to point to DDR memory.

With prefetchable set, a 36-byte transfer generated a
burst-of-8 32-bit words followed by a single transaction.

With non-prefetchable set, the transfers were all single.

So it works like we'd expect.

Cheers,
Dave

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