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Message-ID: <49F74B9E.30105@zytor.com>
Date:	Tue, 28 Apr 2009 11:31:58 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Andrew Morton <akpm@...ux-foundation.org>
CC:	Borislav Petkov <borislav.petkov@....com>, greg@...ah.com,
	linux-kernel@...r.kernel.org, dougthompson@...ssion.com,
	Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH 14/21] amd64_edac: add msr accessors operating on all
 cpus

Andrew Morton wrote:
>>  
>> +/* stolen from msr.c - the calls in msr.c could be exported */
> 
> It would be preferable to export the functions from msr.c!  We do have a number
> of exported MSR manipulation functions in x86.
> 

Even better would be to add these functions to lib/msr.c.

>> +
>> +static void do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx)
>> +{
>> +	struct msr_command cmd;
>> +
>> +	cmd.cpu = raw_smp_processor_id();
>> +	cmd.reg = reg;
>> +	on_each_cpu(smp_rdmsr, &cmd, 1);
>> +	*eax = cmd.data[0];
>> +	*edx = cmd.data[1];
>> +}
> 
> I'm all confused.  We interrupt _all_ CPUs and get each one of them to
> write to cmd.data[0] and cmd.data[1].  So what we end up returning is
> the result which was provided by the last CPU which got there,
> whichever CPU that was.
> 
> Am I mising something, or is this all totally screwy?
> 

For reads, certainly... the only sane way to do this would be to return
this into a array with per-CPU slots (since it's transient I don't think
we want to use a percpu varaible.)

For writes, what is there is fine, although perhaps less flexible than
it needs to be.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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