[<prev] [next>] [day] [month] [year] [list]
Message-ID: <20090430093244.74fcb1af@torg>
Date: Thu, 30 Apr 2009 09:32:44 -0500
From: Clark Williams <williams@...hat.com>
To: "Mao Yilu" <ylmao@...l.ustc.edu.cn>
Cc: "'Henrique de Moraes Holschuh'" <hmh@....eng.br>,
<linux-kernel@...r.kernel.org>
Subject: Re: TSC unstable on Intel Pentium M processor 750
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
On Thu, 30 Apr 2009 15:40:02 +0800
"Mao Yilu" <ylmao@...l.ustc.edu.cn> wrote:
> > -----Original Message-----
> > From: linux-kernel-owner@...r.kernel.org
> > [mailto:linux-kernel-owner@...r.kernel.org] On Behalf Of Henrique de Moraes
> > Holschuh
> > Sent: Thursday, April 30, 2009 11:12 AM
> > To: Mao Yilu
> > Cc: 'Robert Hancock'; linux-kernel@...r.kernel.org
> > Subject: Re: TSC unstable on Intel Pentium M processor 750
> >
> > On Thu, 30 Apr 2009, Mao Yilu wrote:
> > > But I still don't know why the TSC is not correct in the C1 state (hlt
> > > instruction). Is there anything more to influence the TSC? What happened
> > > when the CPU is not running under hlt instruction?
> >
> > SMIs? Laptops love that crap...
>
> What is SMIs?
>
>
System Management Interrupt. Usually handled by BIOS code and
completely invisible to Linux.
Laptops and big servers (rackmount/blades) typically have tons of SMIs
going off to do thermal management, statisics and remote management.
Clark
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.10 (GNU/Linux)
iEYEARECAAYFAkn5tpkACgkQHyuj/+TTEp1CjgCfZkG+/AU9CJrTSrk/+XVqPszS
4aoAoNgvDoLRMRUs1VSXqBRyg2HzPs6U
=drzY
-----END PGP SIGNATURE-----
Powered by blists - more mailing lists