linux-kernel - [PATCH 8/10 -tip] x86: Add cpufeature for Microcode update

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Message-Id: <1242142996.2547.22.camel@ht.satnam>
Date:	Tue, 12 May 2009 21:13:16 +0530
From:	Jaswinder Singh Rajput <jaswinder@...nel.org>
To:	Ingo Molnar <mingo@...e.hu>
Cc:	"H. Peter Anvin" <hpa@...nel.org>,
	Robert Richter <robert.richter@....com>,
	Dave Jones <davej@...hat.com>,
	LKML <linux-kernel@...r.kernel.org>,
	x86 maintainers <x86@...nel.org>
Subject: [PATCH 8/10 -tip] x86: Add cpufeature for Microcode update


Setting microcode update feature to friendly access of UCODE MSRs like:
1. IA32_PLATFORM_ID (Intel)
2. IA32_UCODE_WRITE (Intel)
3. IA32_UCODE_REV (Intel)
4. MSR_AMD64_PATCH_LEVEL (AMD)
5. MSR_AMD64_PATCH_LOADER (AMD)

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@...il.com>
---
 arch/x86/include/asm/cpufeature.h |    1 +
 arch/x86/kernel/cpu/amd.c         |   12 ++++++++++++
 arch/x86/kernel/cpu/intel.c       |   11 +++++++++++
 3 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index d37ab0f..1fd6770 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -155,6 +155,7 @@
 #define X86_FEATURE_IDA		(7*32+ 0) /* Intel Dynamic Acceleration	*/
 #define X86_FEATURE_ARAT	(7*32+ 1) /* Always Running APIC Timer	*/
 #define X86_FEATURE_PNAME	(7*32+ 2) /* Processor Name		*/
+#define X86_FEATURE_MICROCODE	(7*32+ 3) /* Microcode update		*/
 
 /* Virtualization flags: Linux defined */
 #define X86_FEATURE_TPR_SHADOW  (8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 1d36ac4..ca133a0 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -352,6 +352,15 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
 #endif
 }
 
+/* Set cpufeatures to friendly access miscellaneous MSRs		*/
+static void __cpuinit set_soft_cpufeatures(struct cpuinfo_x86 *c)
+{
+	if (c->x86 >= 0x10) {				/* fam10h+	*/
+		/* setting microcode update feature			*/
+		set_cpu_cap(c, X86_FEATURE_MICROCODE);
+	}
+}
+
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
@@ -371,6 +380,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 	}
 #endif
 
+	/* setting early so that other functions can take advantage */
+	set_soft_cpufeatures(c);
+
 	early_init_amd(c);
 
 	/*
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 62130a0..ddb26f2 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -303,10 +303,21 @@ static void __cpuinit detect_vmx_virtcap(struct cpuinfo_x86 *c)
 	}
 }
 
+/* Set cpufeatures to friendly access miscellaneous MSRs		*/
+static void __cpuinit set_soft_cpufeatures(struct cpuinfo_x86 *c)
+{
+	/* setting microcode update feature				*/
+	if (c->x86 >= 6 && !cpu_has(c, X86_FEATURE_IA64))
+		set_cpu_cap(c, X86_FEATURE_MICROCODE);
+}
+
 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 {
 	unsigned int l2 = 0;
 
+	/* setting early so that other functions can take advantage */
+	set_soft_cpufeatures(c);
+
 	early_init_intel(c);
 
 	intel_workarounds(c);
-- 
1.6.0.6



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