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Message-ID: <20090512181338.GK19296@one.firstfloor.org>
Date: Tue, 12 May 2009 20:13:38 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Ulrich Drepper <drepper@...il.com>
Cc: Andi Kleen <andi@...stfloor.org>,
Tobias Doerffel <tobias.doerffel@...il.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: Specific support for Intel Atom architecture
On Tue, May 12, 2009 at 10:45:00AM -0700, Ulrich Drepper wrote:
> On Tue, May 12, 2009 at 8:04 AM, Andi Kleen <andi@...stfloor.org> wrote:
> > The problem is that you can't express the situations where
> > movbe is better than bswap (you need both and the old and the new
> > value) in inline assembler in a way that gcc decides automatically.
>
> True. But I was mostly thinking about loads from memory. A quick
> search for ntoh*/hton* shows code like
>
> u_int16_t queue_num = ntohs(nfmsg->res_id);
>
> If there would be a ntohs_load() macro movbe could be used.
It wouldn't surprise me if
movbe memory,%reg
generates the same uops sequence internally as
mov memory,%reg
bswap %reg
I doubt there's any dedicated hardware for this in Atom (but I don't
know for sure)
So unless you're really decoding constrained it would only
save a few bytes of code size. Probably not worth having
incompatible modules for or adding special code to the source.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only.
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