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Message-ID: <18957.19594.735792.15284@cargo.ozlabs.ibm.com>
Date:	Fri, 15 May 2009 21:05:46 +1000
From:	Paul Mackerras <paulus@...ba.org>
To:	mingo@...e.hu, a.p.zijlstra@...llo.nl,
	linux-kernel@...r.kernel.org, tglx@...utronix.de,
	cjashfor@...ux.vnet.ibm.com
Subject: Re: [tip:perfcounters/core] perf_counter: Rework the perf counter disable/enable

tip-bot for Peter Zijlstra writes:

> x86 NMI/INT throttling has non-nested use of this, breaking things. Therefore
> provide a reference counter disable/enable interface, where the first disable
> disables the hardware, and the last enable enables the hardware again.

It looks to me like what you've done for powerpc enables the hardware
again on the first enable, not the last one:

> @@ -436,7 +435,7 @@ u64 hw_perf_save_disable(void)
>   * If we were previously disabled and counters were added, then
>   * put the new config on the PMU.
>   */
> -void hw_perf_restore(u64 disable)
> +void hw_perf_enable(void)
>  {
>  	struct perf_counter *counter;
>  	struct cpu_hw_counters *cpuhw;
> @@ -448,9 +447,12 @@ void hw_perf_restore(u64 disable)
>  	int n_lim;
>  	int idx;
>  
> -	if (disable)
> -		return;
>  	local_irq_save(flags);
> +	if (!cpuhw->disabled) {
> +		local_irq_restore(flags);
> +		return;
> +	}
> +
>  	cpuhw = &__get_cpu_var(cpu_hw_counters);
>  	cpuhw->disabled = 0;

I do rely on nesting the disable/enable calls and only having the
hardware re-enabled on the last enable.  I can't see anything here
that detects the last enable.  Have I missed it somewhere?

Paul.
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