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Date:	Fri, 15 May 2009 16:39:12 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Paul Mackerras <paulus@...ba.org>
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	linux-kernel@...r.kernel.org,
	Corey Ashford <cjashfor@...ux.vnet.ibm.com>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH 2/3 v2] perf_counter: allow arch to supply event misc
	flags and instruction pointer


* Paul Mackerras <paulus@...ba.org> wrote:

> At present the values we put in overflow events for the misc flags 
> indicating processor mode and the instruction pointer are obtained 
> using the standard user_mode() and instruction_pointer() 
> functions. Those functions tell you where the performance monitor 
> interrupt was taken, which might not be exactly where the counter 
> overflow occurred, for example because interrupts were disabled at 
> the point where the overflow occurred, or because the processor 
> had many instructions in flight and chose to complete some more 
> instructions beyond the one that caused the counter overflow.
> 
> Some architectures (e.g. powerpc) can supply more precise 
> information about where the counter overflow occurred and the 
> processor mode at that point.  This introduces new functions, 
> perf_misc_flags() and perf_instruction_pointer(), which arch code 
> can override to provide more precise information if available.  
> They have default implementations which are identical to the 
> existing code.
> 
> This also adds a new misc flag value, PERF_EVENT_MISC_HYPERVISOR, for
> the case where a counter overflow occurred in the hypervisor.  We
> encode the processor mode in the 2 bits previously used to indicate
> user or kernel mode; the values for user and kernel mode are unchanged
> and hypervisor mode is indicated by both bits being set.
> 
> Signed-off-by: Paul Mackerras <paulus@...ba.org>
> ---
> Patches 1/3 and 3/3 of this series are unchanged.  Ingo, do you need
> me to repost them?

no need, picked them all up, thanks Paul!

	Ingo
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