lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 19 May 2009 10:01:27 -0700
From:	Grant Grundler <grundler@...gle.com>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>, jgarzik@...ox.com,
	hancockrwd@...il.com, htejun@...il.com, alan@...rguk.ukuu.org.uk,
	flar@...andria.com, schmitz@...phys.uni-duesseldorf.de,
	linux-kernel@...r.kernel.org, linux-ide@...r.kernel.org,
	takata@...ux-m32r.org, geert@...ux-m68k.org,
	linux-m68k@...r.kernel.org, ysato@...rs.sourceforge.jp
Subject: Re: [PATCH] asm-generic: add a dma-mapping.h file

On Tue, May 19, 2009 at 9:22 AM, Arnd Bergmann <arnd@...db.de> wrote:
> On Tuesday 19 May 2009, FUJITA Tomonori wrote:
>> > Would you agree to a patch that works with the same
>> > code on e.g. arm, microblaze, mn10300 and sh and
>> > uses only a few #ifdefs?
>>
>> Having such helper for a linear mapping might be helpful but your
>> approach is wrong.
>
> Do you like this approach better? I've merged a few architectures
> that were relatively simple. This file should be usable by all
> architectures that have a linear mapping and are either fully coherent
> (like cris) or just require flushing the dcache when passing a
> buffer to the device.

I've reviewed the first bit and it looks fine (so far to me).
Two related bugs:
1) dma_alloc_coherent() is not respecting the coherent_dma_mask field
in device.h:struct device.
2) dma_map_single() is not respecting dma_mask in struct pci_dev (and
pointer from struct device).

...
> +/**
> + * dma_alloc_coherent - allocate consistent memory for DMA
> + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
> + * @size: required memory size
> + * @handle: bus-specific DMA address
> + *
> + * Allocate some uncached, unbuffered memory for a device for
> + * performing DMA.  This function allocates pages, and will
> + * return the CPU-viewed address, and sets @handle to be the
> + * device-viewed address.

Key here is the DMA is coherent, bi-directional, and the DMA address fit in
the coherent_dma_mask. "uncached/unbuffered" is one way of doing this and
is how we've implemented "DMA coherency" on parisc platforms that don't
have an IOMMU (which all have PA1.1 CPUs) - see arch/parisc/kernel/pci-dma.c

And I'll confess pci-dma.c doesn't implement support for coherent_dma_mask .
AFAIK, the targeted platforms have < 4GB of RAM and only PCI devices.
ISA support is completely missing and is the only case this class of machines
need coherent_dma_mask support.

More comments on how DMA works for PARISC in
arch/parisc/include/asm/dma-mapping.h

hth,
grant
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ