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Message-ID: <20090522200536.GZ10166@const.famille.thibault.fr>
Date:	Fri, 22 May 2009 22:05:36 +0200
From:	Samuel Thibault <samuel.thibault@...-lyon.org>
To:	"Michael S. Zick" <lkml@...ethan.org>
Cc:	Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org
Subject: Re: [BUG FIX] Make x86_32 uni-processor Atomic ops, Atomic

Michael S. Zick, le Fri 22 May 2009 14:53:39 -0500, a écrit :
> Ref: http://developer.intel.com/Assets/PDF/manual/253666.pdf
> Manual page: 3-590  PDF page: 638
> Summary: Processors prior to P-4 can take an interrupt between
> the read cycle and the write cycle. Which is why opcode 0xF0 exists.

Where do you see page 638/639 talking about interrupts?  It talks about
multi-processor machines.

Samuel
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