linux-kernel - Re: Broken ARM atomic ops wrt memory barriers (was : [PATCH] Add cmpxchg support for ARMv6+ systems)

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Message-ID: <20090525193414.GB3667@n2100.arm.linux.org.uk>
Date:	Mon, 25 May 2009 20:34:14 +0100
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
Cc:	Jamie Lokier <jamie@...reable.org>,
	Catalin Marinas <catalin.marinas@....com>,
	linux-arm-kernel@...ts.arm.linux.org.uk,
	linux-kernel@...r.kernel.org
Subject: Re: Broken ARM atomic ops wrt memory barriers (was : [PATCH] Add
	cmpxchg support for ARMv6+ systems)

On Mon, May 25, 2009 at 01:29:55PM -0400, Mathieu Desnoyers wrote:
> Basically, to make sure we don't forget anything, someone should go
> through all the atomic_ops.txt document once more and audit all ARM
> primitives.

That's easy to say - it took me more than half an hour of reading through
atomic_ops.txt to work out what was required for things like cmpxchg,
xchg, etc because it's _very_ waffley and verbose, and directs you to
other parts of the document.

For example, for atomic_cmpxchg it directs you to 'cas' but cas doesn't
really say what the barrier requirements are - reading it leaves me
to expect that provided spinlocks are serializing themselves, it's
fine if 'cas' itself isn't.

Maybe if someone has a few days to translate atomic_ops.txt into a
succinct set of requirements, and get _that_ reviewed, then we could
properly audit this stuff.
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