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Message-ID: <20090526221226.25381.8156.stgit@localhost.localdomain> Date: Tue, 26 May 2009 16:12:28 -0600 From: Paul Walmsley <paul@...an.com> To: linux-arm-kernel@...ts.arm.linux.org.uk Cc: linux-kernel@...r.kernel.org, linux-omap@...r.kernel.org, Paul Walmsley <paul@...an.com> Subject: [PATCH 01/10] OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@...an.com> --- arch/arm/mach-omap2/sram34xx.S | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index c080c82..84781a6 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -102,9 +102,6 @@ configure_core_dpll: orr r12, r12, r3, lsl #0x1B @ r3 contains the M2 val str r12, [r11] ldr r12, [r11] @ posted-write barrier for CM - mov r12, #0x800 @ wait for the clock to stabilise - cmp r3, #2 - bne wait_clk_stable bx lr wait_clk_stable: subs r12, r12, #1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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