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Message-Id: <723b3fe4e35063b123cee9658c24267287eeac07.1243381848.git.ak@linux.intel.com>
Date: Wed, 27 May 2009 01:54:07 +0200
From: Andi Kleen <andi@...stfloor.org>
To: linux-kernel@...r.kernel.org, hpa@...or.com, x86@...nel.org
Cc: Andi Kleen <ak@...ux.intel.com>
Subject: [PATCH 05/31] x86: MCE: Add machine check exception count in /proc/interrupts
From: Andi Kleen <ak@...ux.intel.com>
Impact: feature, debugging tool
Useful for debugging, but it's also good general policy
to have a counter for all special interrupts there. This makes it easier
to diagnose where a CPU is spending its time.
Signed-off-by: Andi Kleen <ak@...ux.intel.com>
---
arch/x86/include/asm/mce.h | 3 +++
arch/x86/kernel/cpu/mcheck/mce.c | 4 ++++
arch/x86/kernel/irq.c | 10 ++++++++++
3 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 8ad67bf..1ff437f 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -89,6 +89,7 @@ struct mce_log {
extern int mce_disabled;
#include <asm/atomic.h>
+#include <linux/percpu.h>
void mce_setup(struct mce *m);
void mce_log(struct mce *m);
@@ -123,6 +124,8 @@ static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
extern int mce_available(struct cpuinfo_x86 *c);
+DECLARE_PER_CPU(unsigned, mce_exception_count);
+
void mce_log_therm_throt_event(__u64 status);
extern atomic_t mce_entry;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 8a8af56..d2d7a68 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -58,6 +58,8 @@ int mce_disabled;
atomic_t mce_entry;
+DEFINE_PER_CPU(unsigned, mce_exception_count);
+
/*
* Tolerant levels:
* 0: always panic on uncorrected errors, log corrected errors
@@ -362,6 +364,8 @@ void do_machine_check(struct pt_regs *regs, long error_code)
atomic_inc(&mce_entry);
+ __get_cpu_var(mce_exception_count)++;
+
if (notify_die(DIE_NMI, "machine check", regs, error_code,
18, SIGKILL) == NOTIFY_STOP)
goto out2;
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 35eddc9..14047b9 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -12,6 +12,7 @@
#include <asm/io_apic.h>
#include <asm/irq.h>
#include <asm/idle.h>
+#include <asm/mce.h>
atomic_t irq_err_count;
@@ -96,6 +97,12 @@ static int show_other_interrupts(struct seq_file *p, int prec)
seq_printf(p, " Threshold APIC interrupts\n");
# endif
#endif
+#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
+ seq_printf(p, "%*s: ", prec, "MCE");
+ for_each_online_cpu(j)
+ seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
+ seq_printf(p, " Machine check exceptions\n");
+#endif
seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
#if defined(CONFIG_X86_IO_APIC)
seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
@@ -163,6 +170,9 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
{
u64 sum = irq_stats(cpu)->__nmi_count;
+#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
+ sum += per_cpu(mce_exception_count, cpu);
+#endif
#ifdef CONFIG_X86_LOCAL_APIC
sum += irq_stats(cpu)->apic_timer_irqs;
sum += irq_stats(cpu)->irq_spurious_count;
--
1.6.0.2
--
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