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Message-Id: <1244139157-16404-7-git-send-email-philipp.zabel@gmail.com>
Date: Thu, 4 Jun 2009 20:12:36 +0200
From: Philipp Zabel <philipp.zabel@...il.com>
To: linux-kernel@...r.kernel.org
Cc: Ian Molton <ian@...menth.co.uk>, Pierre Ossman <pierre@...man.eu>,
Philipp Zabel <philipp.zabel@...il.com>
Subject: [PATCH 6/7] mmc: tmio_mmc: fix SDCLK divider setting
Except for the SDCLK = HCLK (divider bypassed) case, the clock
setting resulted in double the requested frequency.
The smallest possible frequency (f_max/512) is configured with
a divider setting 0x80, not 0x40.
Signed-off-by: Philipp Zabel <philipp.zabel@...il.com>
---
drivers/mmc/host/tmio_mmc.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
index fe6d2b6..9f6e180 100644
--- a/drivers/mmc/host/tmio_mmc.c
+++ b/drivers/mmc/host/tmio_mmc.c
@@ -44,10 +44,10 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
clock <<= 1;
clk >>= 1;
}
- if (clk & 0x1)
- clk = 0x20000;
+ if (clk == 0)
+ clk = 0x8000 << 1;
- clk >>= 2;
+ clk >>= 1;
sd_config_write8(host, CNF_SD_CLK_MODE, (clk & 0x8000) ? 0 : 1);
clk |= 0x100;
}
--
1.6.3.1
--
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