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Message-ID: <20090604203313.GA19286@redhat.com>
Date:	Thu, 4 Jun 2009 16:33:13 -0400
From:	Dave Jones <davej@...hat.com>
To:	"Michael S. Zick" <lkml@...ethan.org>
Cc:	Harald Welte <HaraldWelte@...tech.com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Duane Griffin <duaneg@...da.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: Linux 2.6.30-rc8 [also: VIA Support]

On Thu, Jun 04, 2009 at 01:12:43PM -0500, Michael S. Zick wrote:
 > On Thu June 4 2009, Harald Welte wrote:
 > > On Thu, Jun 04, 2009 at 11:21:28AM -0500, Michael S. Zick wrote:
 > > 
 > > > That is one of my pending questions - -
 > > > (It is included as a comment at the appropriate point in my patchset.)
 > > > 
 > > > The VIA processors have MCR's not MTRR's - -
 > > 
 > > AFAIK, that was true for processors like the Winhcip / C6, i.e. earlier than
 > > the C3.  The C3, C7 and later support 8 intel-style MTRR's.
 > > 
 > 
 > Super!  A specific breakage!
 > 
 > The c7 setup code is re-using the c6 setup code (MCR's) - -
 > Will "if 0" out the appropriate parts and arrange for the MTRR setup.

It's not touching the MCRs.   C7's are family 6. The MCR code is only
called for family 5. (Winchips)   Look at the switch statement
in init_centaur()

	Dave

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