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Message-Id: <1244189111-19639-34-git-send-email-vapier@gentoo.org>
Date: Fri, 5 Jun 2009 04:04:42 -0400
From: Mike Frysinger <vapier@...too.org>
To: linux-kernel@...r.kernel.org
Cc: uclinux-dist-devel@...ckfin.uclinux.org,
Graf Yang <graf.yang@...log.com>
Subject: [PATCH 33/62] Blackfin: add workaround for anomaly 05000287
From: Graf Yang <graf.yang@...log.com>
Signed-off-by: Graf Yang <graf.yang@...log.com>
Signed-off-by: Mike Frysinger <vapier@...too.org>
---
arch/blackfin/kernel/cplb-nompu/cacheinit.c | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
index c6ff947..d5a86c3 100644
--- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
@@ -55,7 +55,14 @@ void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
}
ctrl = bfin_read_DMEM_CONTROL();
- ctrl |= DMEM_CNTR;
+
+ /*
+ * Anomaly notes:
+ * 05000287 - We implement workaround #2 - Change the DMEM_CONTROL
+ * register, so that the port preferences for DAG0 and DAG1 are set
+ * to port B
+ */
+ ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0);
bfin_write_DMEM_CONTROL(ctrl);
SSYNC();
}
--
1.6.3.1
--
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