linux-kernel - Re: [BUILD FAILURE 01/04] Next June 04:PPC64 randconfig [drivers/staging/comedi/drivers.o]

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Message-Id: <1244244700.31984.15.camel@pasglop>
Date:	Sat, 06 Jun 2009 09:31:40 +1000
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	Greg KH <greg@...ah.com>
Cc:	Subrata Modak <subrata@...ux.vnet.ibm.com>,
	Paul Mackerras <paulus@...ba.org>,
	Sachin P Sant <sachinp@...ux.vnet.ibm.com>,
	Linux-Kernel <linux-kernel@...r.kernel.org>,
	Linux-Next <linux-next@...r.kernel.org>,
	Geert Uytterhoeven <Geert.Uytterhoeven@...ycom.com>,
	Stephen Rothwell <sfr@...b.auug.org.au>,
	Geert Uytterhoeven <geert@...ux-m68k.org>,
	Linuxppc-dev <Linuxppc-dev@...abs.org>,
	Michael Ellerman <michael@...erman.id.au>
Subject: Re: [BUILD FAILURE 01/04] Next June 04:PPC64 randconfig
 [drivers/staging/comedi/drivers.o]

On Fri, 2009-06-05 at 11:26 -0700, Greg KH wrote:
> Should the comedi layer just not be using PAGE_KERNEL_NOCACHE here?  I
> can't believe that we need to do something like this in a driver.  What
> should the proper fix for this be?

Actualy, I think powerpc -had- PAGE_KERNEL_NOCACHE and I removed it ...
Oh well... My understanding was that the exposed interface isn't that
but instead pgprot_noncached().

Nowadays we provide these on ppc:

#define pgprot_noncached(prot)    (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
                                            _PAGE_NO_CACHE | _PAGE_GUARDED))

#define pgprot_noncached_wc(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
                                            _PAGE_NO_CACHE))

#define pgprot_cached(prot)       (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
                                            _PAGE_COHERENT))

#define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
                                            _PAGE_COHERENT | _PAGE_WRITETHRU))


Now, of course, expect interesting problems if you use it in vmap, since
you are mapping struct pages, you are effectively mapping memory.

On some platforms, it's absolutely illegal to map memory non-cacheable while
this memory is mapped cacheable elsewhere and can be fatal. But the pages you
are mapping here, I suppose, are also part of the linear mapping which is ...
cacheable.

Why would you need that non-cacheable mapping in the first place ? If it's
for DMA, it's the wrong interface I believe....

Cheers,
Ben.


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