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Message-Id: <200906101301.08483.arnd@arndb.de>
Date:	Wed, 10 Jun 2009 13:01:08 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Yong Wang <yong.y.wang@...ux.intel.com>
Cc:	Ingo Molnar <mingo@...e.hu>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH -tip] perf_counter/x86: Fix the model number of Intel Core2 processors

On Wednesday 10 June 2009, Yong Wang wrote:
> diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
> index 40978aa..a49a82c 100644
> --- a/arch/x86/kernel/cpu/perf_counter.c
> +++ b/arch/x86/kernel/cpu/perf_counter.c
> @@ -1407,7 +1407,8 @@ static int intel_pmu_init(void)
>          * Install the hw-cache-events table:
>          */
>         switch (boot_cpu_data.x86_model) {
> -       case 17:
> +       case 15:
> +       case 23:
>                 memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
>                        sizeof(hw_cache_event_ids));

There are actually four model numbers that refer to the same
core microarchitecture:

model 15: original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe"
model 22: single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L"
model 23: current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale"
model 29: six-core 45 nm xeon "Dunnington"

You should probably list all of them here.

	Arnd <><
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