linux-kernel - Re: [PATCH] perf_counter: extensible perf_counter

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Message-ID: <4A302E83.8060807@linux.vnet.ibm.com>
Date:	Wed, 10 Jun 2009 15:06:59 -0700
From:	Corey Ashford <cjashfor@...ux.vnet.ibm.com>
To:	Paul Mackerras <paulus@...ba.org>
CC:	Ingo Molnar <mingo@...e.hu>, Peter Zijlstra <peterz@...radead.org>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] perf_counter: extensible perf_counter_attr

Paul Mackerras wrote:
> Corey Ashford writes:
> 
>> Ok, some disclosure here: we have not yet supported either of these features in 
>> the Power PMU's in any open source code (and perhaps the proprietary code too, 
>> but I don't know about that).  Since these features are described in an IBM 
>> proprietary document, I can't describe how they work here, except to say that 
>> they are present in the chip.
> 
> Actually, the public PPC970FX user manual has a chapter on the
> performance monitor unit which describes both thresholding and the
> instruction matching CAM, among other things.

Ah, good point!

Anyone interested can find the 970FX (G5) manual here: www.cs.lth.se/EDA116/G5.pdf
It's supposed to be on the IBM web site too, but for some reason, the link is 
broken (reported!).

> 
> I think we can support thresholding using higher-order bits of the
> event code when the low bits == PM_THRESH_TIMEO.  We can only have one
> PM_THRESH_TIMEO event on the PMU at any given time, so there can't be
> any conflict over the thresholder settings.
> 
> The IMC is more problematic, but we can't do much with it on POWER5
> and later processors anyway, due to various things being accessible
> only in hypervisor mode, so I have been ignoring it. :)
> 
> Paul.

Ug.  Well, there's always bare-metal Linux :)

- Corey

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