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Message-Id: <1244835318.2802.1.camel@ht.satnam>
Date: Sat, 13 Jun 2009 01:05:18 +0530
From: Jaswinder Singh Rajput <jaswinder@...nel.org>
To: Ingo Molnar <mingo@...e.hu>
Cc: Thomas Gleixner <tglx@...utronix.de>,
x86 maintainers <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2 -tip] x86: perf_counter update AMD hw caching
related event table
On Fri, 2009-06-12 at 19:35 +0200, Ingo Molnar wrote:
> * Jaswinder Singh Rajput <jaswinder@...nel.org> wrote:
>
> > AMD shares same hw caching related event table.
> >
> > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@...il.com>
> > ---
> > arch/x86/kernel/cpu/perf_counter.c | 36 +++++++++++++++---------------------
> > 1 files changed, 15 insertions(+), 21 deletions(-)
>
> Looks good - but your patch does not apply anymore. (Neither to -git
> nor to -tip)
>
It is because of L2 -> LL
Here are new patches :
[PATCH 1/2 -tip] x86: perf_counter check AMD performance monitoring support
AMD supports performance monitoring from K7.
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@...il.com>
---
arch/x86/kernel/cpu/perf_counter.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 275bc14..b74e602 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -1459,6 +1459,10 @@ static int intel_pmu_init(void)
static int amd_pmu_init(void)
{
+ /* performance-monitoring supported from K7 */
+ if (boot_cpu_data.x86 < 6)
+ return -ENODEV;
+
x86_pmu = amd_pmu;
switch (boot_cpu_data.x86) {
--
1.6.0.6
--
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