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Message-ID: <18996.60235.178618.531664@cargo.ozlabs.ibm.com>
Date: Sun, 14 Jun 2009 22:21:31 +1000
From: Paul Mackerras <paulus@...ba.org>
To: Avi Kivity <avi@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>,
benh@...nel.crashing.org, akpm@...ux-foundation.org,
linuxppc-dev@...abs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] lib: Provide generic atomic64_t implementation
Avi Kivity writes:
> An alternative implementation using 64-bit cmpxchg will recover most of
> the costs of hashed spinlocks. I assume most serious 32-bit
> architectures have them?
Have a 64-bit cmpxchg, you mean? x86 is the only one I know of, and
it already has an atomic64_t implementation using cmpxchg8b (or
whatever it's called).
My thinking is that the 32-bit non-x86 architectures will be mostly
UP, so the overhead is just an interrupt enable/restore. Those that
are SMP I would expect to be small SMP -- mostly just 2 cpus and maybe
a few 4-way systems.
Paul.
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