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Message-ID: <4A369573.1060504@zytor.com>
Date: Mon, 15 Jun 2009 11:39:47 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Ingo Molnar <mingo@...e.hu>
CC: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>,
Linus Torvalds <torvalds@...ux-foundation.org>,
mingo@...hat.com, paulus@...ba.org, acme@...hat.com,
linux-kernel@...r.kernel.org, a.p.zijlstra@...llo.nl,
penberg@...helsinki.fi, vegard.nossum@...il.com, efault@....de,
jeremy@...p.org, npiggin@...e.de, tglx@...utronix.de,
linux-tip-commits@...r.kernel.org
Subject: Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support
to use NMI-safe methods
Ingo Molnar wrote:
> * Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca> wrote:
>
>> Hrm, would it be possible to save the c2 register upon nmi handler
>> entry and restore it before iret instead ? This would ensure a
>> nmi-interrupted page fault handler would continue what it was
>> doing with a non-corrupted cr2 register after returning from nmi.
>>
>> Plus, this involves no modification to the page fault handler fast
>> path.
>
> I guess this kind of nesting would work too - assuming the cr2 can
> be written to robustly.
>
> And i suspect CPU makers pull off a few tricks to stage the cr2 info
> away from the page fault entry execution asynchronously, so i'd not
> be surprised if writing to it uncovered unknown-so-far side-effects
> in CPU implementations.
>
I wouldn't actually expect that, *as long as* there is serialization
between the cr2 write and the cr2 read.
-hpa
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