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Message-ID: <alpine.LFD.2.01.0906151152170.6276@localhost.localdomain>
Date:	Mon, 15 Jun 2009 12:04:42 -0700 (PDT)
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Ingo Molnar <mingo@...e.hu>
cc:	Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>, mingo@...hat.com,
	hpa@...or.com, paulus@...ba.org, acme@...hat.com,
	linux-kernel@...r.kernel.org, a.p.zijlstra@...llo.nl,
	penberg@...helsinki.fi, vegard.nossum@...il.com, efault@....de,
	jeremy@...p.org, npiggin@...e.de, tglx@...utronix.de,
	linux-tip-commits@...r.kernel.org
Subject: Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support
 to use NMI-safe methods



On Mon, 15 Jun 2009, Ingo Molnar wrote:
> 
> The gist of it is the replacement of iret with this open-coded 
> sequence:
> 
> +#define NATIVE_INTERRUPT_RETURN_NMI_SAFE	pushq %rax;		\
> +						movq %rsp, %rax;	\
> +						movq 24+8(%rax), %rsp;	\
> +						pushq 0+8(%rax);	\
> +						pushq 16+8(%rax);	\
> +						movq (%rax), %rax;	\
> +						popfq;			\
> +						ret

That's an odd way of writing it.

Don't we have a per-cpu segment here? I'd much rather just see it do 
something like this (_before_ restoring the regular registers)

	movq EIP(%esp),%rax
	movq ESP(%esp),%rdx
	movq %rax,gs:saved_esp
	movq %rdx,gs:saved_eip

	# restore regular regs
	RESTORE_ALL

	# skip eip/esp to get at eflags
	addl $16,%esp
	popfq

	# restore rsp/rip
	movq gs:saved_esp,%rsp
	jmpq *(gs:saved_eip)

but I haven't thought deeply about it. Maybe there's something wrong with 
the above.

> If it's faster, this becomes a legit (albeit complex) 
> micro-optimization in a _very_ hot codepath.

I don't think it's all that hot. It's not like it's the return to user 
mode.

			Linus
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