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Message-ID: <4A36AAC4.9040305@zytor.com>
Date: Mon, 15 Jun 2009 13:10:44 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
CC: Ingo Molnar <mingo@...e.hu>,
Linus Torvalds <torvalds@...ux-foundation.org>,
mingo@...hat.com, paulus@...ba.org, acme@...hat.com,
linux-kernel@...r.kernel.org, a.p.zijlstra@...llo.nl,
penberg@...helsinki.fi, vegard.nossum@...il.com, efault@....de,
jeremy@...p.org, npiggin@...e.de, tglx@...utronix.de,
linux-tip-commits@...r.kernel.org
Subject: Re: [tip:perfcounters/core] perf_counter: x86: Fix call-chain support
to use NMI-safe methods
Mathieu Desnoyers wrote:
>
> In the category "crazy ideas one should never express out loud", I could add the
> following. We could choose to save/restore the cr2 register on the local stack
> at every interrupt entry/exit, and therefore allow the page fault handler to
> execute with interrupts enabled.
>
> I have not benchmarked the interrupt disabling overhead of the page fault
> handler handled by starting an interrupt-gated handler rather than trap-gated
> handler, but cli/sti instructions are known to take quite a few cycles on some
> architectures. e.g. 131 cycles for the pair on P4, 23 cycles on AMD Athlon X2
> 64, 43 cycles on Intel Core2.
>
> I am tempted to think that taking, say, ~10 cycles on the interrupt path worths
> it if we save a few tens of cycles on the page fault handler fast path.
>
Doesn't sound all that crazy, I suspect the underlying assumption that
interrupt gates are slower than trap gates is incorrect. Disabling
interrupts itself isn't expensive, it's the synchronization requirements.
-hpa
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