linux-kernel - Re: Accessing user memory from NMI

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Message-ID: <20090620174022.GA29685@elte.hu>
Date:	Sat, 20 Jun 2009 19:40:22 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Vegard Nossum <vegard.nossum@...il.com>,
	Steven Rostedt <rostedt@...dmis.org>,
	Paul Mackerras <paulus@...ba.org>,
	linux-kernel@...r.kernel.org, benh@...nel.crashing.org
Subject: Re: Accessing user memory from NMI


* Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca> wrote:

> * Ingo Molnar (mingo@...e.hu) wrote:
> > 
> > * Peter Zijlstra <a.p.zijlstra@...llo.nl> wrote:
> > 
> > > On Thu, 2009-06-18 at 18:20 +1000, Paul Mackerras wrote:
> > >
> > > > What was the conclusion you guys came to about doing a user 
> > > > stack backtrace in an NMI handler?  Are you going to access user 
> > > > memory directly or are you going to use the 
> > > > __fast_get_user_pages approach?
> > > > 
> > > > Ben H and I were talking today about what we'd need in order to 
> > > > be able to read user memory in a PMU interrupt handler.  It 
> > > > looks like we could read user memory directly with a bit of 
> > > > care, on 64-bit at least.  Because of the MMU hash table that 
> > > > would almost always work provided the page has already been 
> > > > touched (which stack pages would have been), but there is a 
> > > > small chance that the access might fail even if the address has 
> > > > a valid PTE.  At that point we could fall back to the 
> > > > __fast_get_user_pages method, but I'm not sure it's worth it.
> > > 
> > > Currently we have the GUP based approach, but Ingo is thikning 
> > > about making the pagefault handler NMI safe on x86 for .32.
> > 
> > Vegard raised the point that making NMIs pagefault-safe is also a 
> > plus for making kmemcheck NMI-safe.
> > 
> > So besides it being faster (direct memory access versus 150 cycles 
> > GUP walk ... per frame entry!), it's also more robust in general.
> > 
> > But too ambitious for v2.6.31 i think, unless patches become ready 
> > really soon. What we have right now is the 64-bit only and 
> > paravirt-unaware half-ported solution below.
> 
> Side note: saving/restoring the cr2 register would additionally be 
> required around page faults in nmi handler in addition to the 
> patch below, both for 32 and 64-bits x86.

Correct, i just mentioned that in another mail - it is required to 
make sure we dont corrupt the main pagefault handler's cr2.

	Ingo
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