linux-kernel - Re: [git pull] drm: previous pull req + 1.

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Message-Id: <1245619456.4937.35.camel@tiger>
Date:	Sun, 21 Jun 2009 22:24:16 +0100
From:	Chris Wilson <chris@...is-wilson.co.uk>
To:	Maxim Levitsky <maximlevitsky@...il.com>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	Dave Airlie <airlied@...ux.ie>, linux-kernel@...r.kernel.org,
	dri-devel@...ts.sf.net
Subject: Re: [git pull] drm: previous pull req + 1.

On Sun, 2009-06-21 at 17:47 +0300, Maxim Levitsky wrote:
> > 52dc7d32b88156248167864f77a9026abe27b432 is first bad commit
> > commit 52dc7d32b88156248167864f77a9026abe27b432
> > Author: Chris Wilson <chris@...is-wilson.co.uk>
> > Date:   Sat Jun 6 09:46:01 2009 +0100

The error here seems to be my presumption that only the i915 was using
fences for GPU access. (In hindsight, it seems obvious that we do not
know why the fence was allocated for the object and so if it has
outstanding rendering, we must assume that it is using a fence for a
rendering op.)

To confirm, please can you try:

diff --git a/drivers/gpu/drm/i915/i915_gem.c
b/drivers/gpu/drm/i915/i915_gem.c
index fd2b8bd..0735518 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2347,7 +2347,7 @@ i915_gem_object_put_fence_reg(struct
drm_gem_object *obj)
         * therefore we must wait for any outstanding access to complete
         * before clearing the fence.
         */
-       if (!IS_I965G(dev)) {
+       if (1) {
                int ret;
 
                i915_gem_object_flush_gpu_write_domain(obj);

(I'm travelling tomorrow, so if this does turn out to be the fault, I'd
appreciate it if someone wrote it up as a complete patch.)

> However I can't reproduce the situation I have earlier, maybe I have changed some settings, don't know.
> Now, the bad behavior (and I reproduced it many times, is that GE shows incorrect textures 
> (like they are divided in tiny interlaced rows, one row ok, other contain image from other part of world), only few textures are such
> it seems logical that this is related to tiling.

What you describe is exactly the artefact you would see when you access
a tiled texture using linear addressing. Pretty conclusive evidence that
we do need to flush outstanding GPU access.

> Also, if I maximize it, it hangs. This seems to be a separate bug introduced by these series.

It does seem like a separate bug. Hopefully, we can get a better handle
on it after we fix this obnoxious tiling issue.
-ickle

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