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Message-Id: <1245770161.3701.42.camel@x2.microgate.com>
Date: Tue, 23 Jun 2009 10:16:01 -0500
From: Paul Fulghum <paulkf@...rogate.com>
To: Andrew Morton <akpm@...ux-foundation.org>
Cc: Alan Cox <alan@...rguk.ukuu.org.uk>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] synclink_gt fix transmit race and timeout
On Mon, 2009-06-22 at 23:19 -0700, Andrew Morton wrote:
> On Tue, 16 Jun 2009 14:44:11 -0500 Paul Fulghum <paulkf@...rogate.com> wrote:
>
> > Fix race condition when adding transmit data to active DMA buffer ring
> > that can cause transmit stall.
> It's not a terribly good changelog, sorry.
> It fails to describe the race condition?
I attempted to say what was done in the change log and
let the patch describe the details of how it was done.
But I can see that might not be enough.
How's this? :
If after adding transmit data to the transmit DMA ring the
transmit DMA controller has become inactive before reading
the new data and the serial transmitter is still active sending
data already in the transmit FIFO and/or shift register,
then wait for the serial transmitter to become idle before
reactivating the transmit DMA controller.
Otherwise the transmit DMA controller may present the
new data to the serial transmitter in a small timing window
just as the serial transmitter transitions to the idle state.
Hitting this window results in the serial transmitter entering
an inconsistent state where it does not process the new data
and does not signal the transition to the idle state.
>>From the driver perspective, this condition appears as an
active transmit DMA controller (correct) with unsent DMA buffers
(correct) and an active serial transmitter (wrong), even though
no data is actually being sent. When all the DMA buffers are full,
no further data is accepted from a user application calling
write() until a timeout occurs and the transmitter and
DMA controller are reset.
--
If this is good enough, I will resubmit the patch with
the updated change log.
--
Paul Fulghum
Microgate Systems, Ltd
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