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Message-ID: <20090623171022.GI5139@amd.com>
Date: Tue, 23 Jun 2009 19:10:22 +0200
From: Joerg Roedel <joerg.roedel@....com>
To: Marcelo Tosatti <mtosatti@...hat.com>
CC: Avi Kivity <avi@...hat.com>, Marcelo Tosatti <marcelo@...ck.org>,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 5/8] kvm/mmu: make direct mapping paths aware of
mapping levels
On Tue, Jun 23, 2009 at 01:47:28PM -0300, Marcelo Tosatti wrote:
> On Fri, Jun 19, 2009 at 03:16:26PM +0200, Joerg Roedel wrote:
> > @@ -254,7 +254,7 @@ static int is_last_spte(u64 pte, int level)
> > {
> > if (level == PT_PAGE_TABLE_LEVEL)
> > return 1;
> > - if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
> > + if (is_large_pte(pte))
> > return 1;
>
> Wouldnt it be safer to check for bit 7 only on the levels
> we're sure it means large page?
If we are not on PT_PAGE_TABLE_LEVEL and this bit does not mean "large page"
then bit 7 is MBZ and harware would fault. So it should be safe to just check
for bit 7 here.
> > kvm_get_pfn(pfn);
> > mmu_set_spte(vcpu, spte, page->role.access, pte_access, 0, 0,
> > - gpte & PT_DIRTY_MASK, NULL, largepage,
> > + gpte & PT_DIRTY_MASK, NULL, level,
> > gpte_to_gfn(gpte), pfn, true);
>
> It would be better to just turn off updates to large sptes via
> update_pte path, so just nuke them and let the pagefault path
> handle.
Yeah true. Thats in the shadow paging patch. Maybe I can get it into a state to
be postable again ;-)
Thanks,
Joerg
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