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Message-ID: <8bd0f97a0906240802ieec96fav2864fa199d3f1b90@mail.gmail.com>
Date: Wed, 24 Jun 2009 11:02:48 -0400
From: Mike Frysinger <vapier.adi@...il.com>
To: Arnd Bergmann <arnd@...db.de>
Cc: Ingo Molnar <mingo@...e.hu>, Thomas Gleixner <tglx@...utronix.de>,
Steven Rostedt <rostedt@...dmis.org>,
Linux kernel mailing list <linux-kernel@...r.kernel.org>
Subject: Re: PREEMPT_ACTIVE too low error with all asm-generic headers for
some arches
On Wed, Jun 24, 2009 at 10:02, Arnd Bergmann wrote:
> On Wednesday 24 June 2009, Ingo Molnar wrote:
>> * Mike Frysinger <vapier.adi@...il.com> wrote:
>> > if we look at linux/hardirq.h, it makes this claim:
>> > * - bit 28 is the PREEMPT_ACTIVE flag
>> > if that's true, then why are we letting any arch set this define ? a
>> > quick survey shows that half the arches (11) are using 0x10000000 (bit
>> > 28) while the other half (10) are using 0x4000000 (bit 26). and then
>> > there is the ia64 oddity which uses bit 30. the exact value here
>> > shouldnt really matter across arches though should it ?
>
> actually alpha, arm and avr32 also use bit 30 (0x40000000), there are only
> five (or eight, depending on how you count) architectures (blackfin, h8300,
> m68k, s390 and sparc) using bit 26.
meh, too many zeros ;)
>> Correct - what matters is to have no collision between the fields.
>>
>> > how about adding this to linux/thread_info.h:
>> > #ifndef PREEMPT_ACTIVE
>> > # ifndef PREEMPT_ACTIVE_BIT
>> > # define PREEMPT_ACTIVE_BIT 28
>> > # endif
>> > # define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT)
>> > #endif
>>
>> Makes sense i guess - but do we really need that level of
>> #ifdef nesting? PREEMPT_ACTIVE_BIT should be the main control - with
>> a default to 28 if it's not set. PREEMPT_ACTIVE is then derived off
>> that, without any #ifdefs.
>
> I think it would fit better into linux/hardirq.h instead of
> linux/thread_info.h, because that is where the other bits of
> the preempt count are defined.
agreed
> --- a/include/linux/hardirq.h
> +++ b/include/linux/hardirq.h
> @@ -62,6 +62,12 @@
> #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
> #define NMI_OFFSET (1UL << NMI_SHIFT)
>
> +#ifndef PREEMPT_ACTIVE
> +#define PREEMPT_ACTIVE_BITS 1
> +#define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
> +#define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_SHIFT)
i think you meant "<< PREEMPT_ACTIVE_SHIFT" there. once i make that
change, it builds fine.
-mike
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