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Message-ID: <20090629132926.GB20289@redhat.com>
Date: Mon, 29 Jun 2009 16:29:26 +0300
From: Gleb Natapov <gleb@...hat.com>
To: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Cc: Suresh Siddha <suresh.b.siddha@...el.com>,
Sheng Yang <sheng@...ux.intel.com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"avi@...hat.com" <avi@...hat.com>
Subject: [PATCH v3] enable x2APIC without interrupt remapping under KVM
KVM would like to provide x2APIC interface to a guest without emulating
interrupt remapping device. The reason KVM prefers guest to use x2APIC
is that x2APIC interface is better virtualizable and provides better
performance than mmio xAPIC interface:
- msr exits are faster than mmio (no page table walk, emulation)
- no need to read back ICR to look at the busy bit
- one 64 bit ICR write instead of two 32 bit writes
- shared code with the Hyper-V paravirt interface
Included patch changes x2APIC enabling logic to enable it even if IR
initialization failed, but kernel runs under KVM and no apic id is
greater than 255 (if there is one spec requires BIOS to move to x2apic
mode before starting an OS).
Signed-off-by: Gleb Natapov <gleb@...hat.com>
---
v2:
Add help message to Kconfig
Force physical mode if IR is not available.
v3:
disable io-apic in outer function. Enable x2apic mode with masked
io-apic
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index d1430ef..3e5b6ea 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -260,12 +260,15 @@ config SMP
config X86_X2APIC
bool "Support x2apic"
- depends on X86_LOCAL_APIC && X86_64 && INTR_REMAP
+ depends on X86_LOCAL_APIC && X86_64
---help---
This enables x2apic support on CPUs that have this feature.
This allows 32-bit apic IDs (so it can support very large systems),
- and accesses the local apic via MSRs not via mmio.
+ and accesses the local apic via MSRs not via mmio. CONFIG_INTR_REMAP
+ is required for x2apic to take affect when running on physical
+ machine. If you intend to run the kernel as KVM guest x2apic can
+ be used without interrupt remapping.
If you don't know what to do here, say N.
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 8c7c042..f5f02c3 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -49,6 +49,7 @@
#include <asm/mtrr.h>
#include <asm/smp.h>
#include <asm/mce.h>
+#include <asm/kvm_para.h>
unsigned int num_processors;
@@ -1363,52 +1364,76 @@ void enable_x2apic(void)
}
#endif /* CONFIG_X86_X2APIC */
-void __init enable_IR_x2apic(void)
+int __init enable_IR(void)
{
#ifdef CONFIG_INTR_REMAP
int ret;
- unsigned long flags;
- struct IO_APIC_route_entry **ioapic_entries = NULL;
ret = dmar_table_init();
if (ret) {
pr_debug("dmar_table_init() failed with %d:\n", ret);
- goto ir_failed;
+ return 0;
}
if (!intr_remapping_supported()) {
pr_debug("intr-remapping not supported\n");
- goto ir_failed;
+ return 0;
}
-
if (!x2apic_preenabled && skip_ioapic_setup) {
pr_info("Skipped enabling intr-remap because of skipping "
"io-apic setup\n");
- return;
+ return 0;
}
+ if (enable_intr_remapping(x2apic_supported()))
+ return 0;
+
+ pr_info("Enabled Interrupt-remapping\n");
+
+ return 1;
+
+#endif
+ return 0;
+}
+
+void __init enable_IR_x2apic(void)
+{
+ unsigned long flags;
+ struct IO_APIC_route_entry **ioapic_entries = NULL;
+ int ret, x2apic_enabled = 0;
+
ioapic_entries = alloc_ioapic_entries();
if (!ioapic_entries) {
- pr_info("Allocate ioapic_entries failed: %d\n", ret);
- goto end;
+ pr_info("Allocate ioapic_entries failed\n");
+ return;
}
ret = save_IO_APIC_setup(ioapic_entries);
if (ret) {
pr_info("Saving IO-APIC state failed: %d\n", ret);
- goto end;
+ free_ioapic_entries(ioapic_entries);
+ return;
}
local_irq_save(flags);
- mask_IO_APIC_setup(ioapic_entries);
mask_8259A();
+ mask_IO_APIC_setup(ioapic_entries);
- ret = enable_intr_remapping(x2apic_supported());
- if (ret)
- goto end_restore;
+ ret = enable_IR();
+ if (!ret) {
+ /* IR is required if x2apic is enabled by BIOS even
+ * when running in kvm since this indicates present
+ * of APIC ID > 255 */
+ if (x2apic_preenabled || !kvm_para_available())
+ goto nox2apic;
+ else
+ /* without IR all CPUs can be addressed by IOAPIC/MSI
+ * only in physical mode */
+ x2apic_phys = 1;
+ }
- pr_info("Enabled Interrupt-remapping\n");
+ x2apic_enabled = 1;
if (x2apic_supported() && !x2apic_mode) {
x2apic_mode = 1;
@@ -1416,41 +1441,28 @@ void __init enable_IR_x2apic(void)
pr_info("Enabled x2apic\n");
}
-end_restore:
- if (ret)
- /*
- * IR enabling failed
- */
+nox2apic:
+ if (!ret) /* IR enabling failed */
restore_IO_APIC_setup(ioapic_entries);
-
unmask_8259A();
local_irq_restore(flags);
-end:
- if (ioapic_entries)
- free_ioapic_entries(ioapic_entries);
+ free_ioapic_entries(ioapic_entries);
- if (!ret)
+ if (x2apic_enabled)
return;
-ir_failed:
- if (x2apic_preenabled)
+ if (x2apic_preenabled) {
+#ifdef CONFIG_INTR_REMAP
panic("x2apic enabled by bios. But IR enabling failed");
- else if (cpu_has_x2apic)
- pr_info("Not enabling x2apic,Intr-remapping\n");
#else
- if (!cpu_has_x2apic)
- return;
-
- if (x2apic_preenabled)
panic("x2apic enabled prior OS handover,"
- " enable CONFIG_X86_X2APIC, CONFIG_INTR_REMAP");
+ " enable CONFIG_X86_X2APIC, CONFIG_INTR_REMAP");
#endif
-
- return;
+ } else if (cpu_has_x2apic)
+ pr_info("Not enabling x2apic,Intr-remapping\n");
}
-
#ifdef CONFIG_X86_64
/*
* Detect and enable local APICs on non-SMP boards.
--
Gleb.
--
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