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Message-ID: <e9c3a7c20907011818q6151b7e1gf6d89f52296362f2@mail.gmail.com>
Date:	Wed, 1 Jul 2009 18:18:23 -0700
From:	Dan Williams <dan.j.williams@...el.com>
To:	Nicolas Ferre <nicolas.ferre@...el.com>
Cc:	maciej.sosnowski@...el.com, avictor.za@...il.com,
	linux-arm-kernel@...ts.arm.linux.org.uk, patrice.vilchez@...el.com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2 v2] dmaengine: at_hdmac: new driver for the Atmel AHB 
	DMA Controller

On Fri, Jun 26, 2009 at 3:42 AM, Nicolas Ferre<nicolas.ferre@...el.com> wrote:
> This AHB DMA Controller (aka HDMA or DMAC on AT91 systems) is availlable on
> at91sam9rl chip. It will be used on other products in the future.
>
> This first release covers only the memory-to-memory tranfer type. This is the
> only tranfer type supported by this chip.  On other products, it will be used
> also for peripheral DMA transfer (slave API support to come).
>
> I used dmatest client without problem in different configurations to test it.
>
> Full documentation for this controller can be found in the SAM9RL datasheet:
> http://www.atmel.com/dyn/products/product_card.asp?part_id=4243
>
> Signed-off-by: Nicolas Ferre <nicolas.ferre@...el.com>
> ---
[..]

A quick review comment:

> +/**
> + * atc_desc_get - get a unsused descriptor from free_list
> + * @atchan: channel we want a new descriptor for
> + */
> +static struct at_desc *atc_desc_get(struct at_dma_chan *atchan)
> +{
> +       struct at_desc *desc, *_desc;
> +       struct at_desc *ret = NULL;
> +       unsigned int i = 0;
> +       LIST_HEAD(tmp_list);
> +
> +       spin_lock_bh(&atchan->lock);
> +       list_for_each_entry_safe(desc, _desc, &atchan->free_list, desc_node) {
> +               i++;
> +               if (async_tx_test_ack(&desc->txd)) {
> +                       list_del(&desc->desc_node);
> +                       ret = desc;
> +                       break;
> +               }
> +               dev_dbg(chan2dev(&atchan->chan_common),
> +                               "desc %p not ACKed\n", desc);
> +       }
> +       spin_unlock_bh(&atchan->lock);
> +       dev_vdbg(chan2dev(&atchan->chan_common),
> +               "scanned %u descriptors on freelist\n", i);
> +
> +       /* no more descriptor available in initial pool : create some more */
> +       if (!ret) {
> +               for (i = 0; i < INIT_NR_DESCS_PER_CHANNEL; i++) {
> +                       desc = atc_alloc_descriptor(&atchan->chan_common,
> +                                                   GFP_KERNEL);

This cannot be GFP_KERNEL as ->prep_dma_memcpy may be called from an
atomic context.  Given that this should only be done in emergency
situations this allocation should probably happen one descriptor at a
time, if it must happen at all.  My recommendation is that if you find
that the driver runs out of descriptors on a regular basis increase
INIT_NR_DESCS_PER_CHANNEL  and only operate with the descriptors
allocated from atc_alloc_chan_resources().  As it stands this allows
the descriptor list to grow without bounds.

Regards,
Dan
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