linux-kernel - [tip:perfcounters/urgent] x86: atomic64: Improve atomic64_add

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Message-ID: <tip-824975ef190e7dcb77718d1cc2cb53769b16d918@git.kernel.org>
Date:	Fri, 3 Jul 2009 12:43:29 GMT
From:	tip-bot for Ingo Molnar <mingo@...e.hu>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, acme@...hat.com, paulus@...ba.org,
	hpa@...or.com, mingo@...hat.com, eric.dumazet@...il.com,
	a.p.zijlstra@...llo.nl, torvalds@...ux-foundation.org,
	efault@....de, arnd@...db.de, dhowells@...hat.com,
	fweisbec@...il.com, akpm@...ux-foundation.org, tglx@...utronix.de,
	mingo@...e.hu
Subject: [tip:perfcounters/urgent] x86: atomic64: Improve atomic64_add_return()

Commit-ID:  824975ef190e7dcb77718d1cc2cb53769b16d918
Gitweb:     http://git.kernel.org/tip/824975ef190e7dcb77718d1cc2cb53769b16d918
Author:     Ingo Molnar <mingo@...e.hu>
AuthorDate: Fri, 3 Jul 2009 12:39:07 +0200
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Fri, 3 Jul 2009 13:26:42 +0200

x86: atomic64: Improve atomic64_add_return()

Linus noted (based on Eric Dumazet's numbers) that we would
probably be better off not trying an atomic_read() in
atomic64_add_return() but intead intentionally let the first
cmpxchg8b fail - to get a cache-friendly 'give me ownership
of this cacheline' transaction. That can then be followed
by the real cmpxchg8b which sets the value local to the CPU.

Reported-by: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Eric Dumazet <eric.dumazet@...il.com>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Mike Galbraith <efault@....de>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Frederic Weisbecker <fweisbec@...il.com>
Cc: David Howells <dhowells@...hat.com>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Arnd Bergmann <arnd@...db.de>
LKML-Reference: <alpine.LFD.2.01.0907021653030.3210@...alhost.localdomain>
Signed-off-by: Ingo Molnar <mingo@...e.hu>


---
 arch/x86/lib/atomic64_32.c |   15 ++++++++++++---
 1 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/x86/lib/atomic64_32.c b/arch/x86/lib/atomic64_32.c
index 5fc1e2c..6195962 100644
--- a/arch/x86/lib/atomic64_32.c
+++ b/arch/x86/lib/atomic64_32.c
@@ -76,13 +76,22 @@ u64 atomic64_read(atomic64_t *ptr)
  */
 u64 atomic64_add_return(u64 delta, atomic64_t *ptr)
 {
-	u64 old_val, new_val;
+	/*
+	 * Try first with a (probably incorrect) assumption about
+	 * what we have there. We'll do two loops most likely,
+	 * but we'll get an ownership MESI transaction straight away
+	 * instead of a read transaction followed by a
+	 * flush-for-ownership transaction:
+	 */
+	u64 old_val, new_val, real_val = 1ULL << 32;
 
 	do {
-		old_val = atomic_read(ptr);
+		old_val = real_val;
 		new_val = old_val + delta;
 
-	} while (atomic64_cmpxchg(ptr, old_val, new_val) != old_val);
+		real_val = atomic64_cmpxchg(ptr, old_val, new_val);
+
+	} while (real_val != old_val);
 
 	return new_val;
 }
--
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