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Message-ID: <8bd0f97a0907150418x5190c8e2o31bee10533478372@mail.gmail.com>
Date: Wed, 15 Jul 2009 07:18:40 -0400
From: Mike Frysinger <vapier.adi@...il.com>
To: David Howells <dhowells@...hat.com>
Cc: Bernd Schmidt <bernds_cb1@...nline.de>,
uclinux-dist-devel@...ckfin.uclinux.org,
linux-kernel@...r.kernel.org
Subject: Re: [Uclinux-dist-devel] [PATCH v2] NOMMU: add support for Memory
Protection Units (MPU)
On Wed, Jul 15, 2009 at 06:31, David Howells wrote:
> Bernd Schmidt wrote:
>> No page table, just three bitmaps (r/w/x), with one bit per page, per mm.
>
> That sounds a bit inefficient as you have to make three accesses per page. I
> suppose it depends on how your MPU works.
there isnt any hardware assistance in terms of speeding up misses.
they're treated like any other hardware exception. it does
differentiate between inst and data misses though, so the software
replacement algorithm doesnt have to check all three.
the code for handling CPLB (effectively the same thing as a TLB for
this discussion) is contained in
arch/blackfin/kernel/cplb-mpu/cplbmgr.c. it's a pretty small file --
the entry point is cplb_hdr() and that calls the relevant function to
handle inst or data misses.
-mike
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