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Date:	Tue, 21 Jul 2009 12:44:43 +0200
From:	Borislav Petkov <borislav.petkov@....com>
To:	Andi Kleen <andi@...stfloor.org>
CC:	mingo@...e.hu, hpa@...or.com, tglx@...utronix.de, norsk5@...oo.com,
	aris@...hat.com, linux-kernel@...r.kernel.org, x86@...nel.org
Subject: Re: [PATCH 07/14] mce3: pass mce info to EDAC for decoding

On Mon, Jul 20, 2009 at 08:04:46PM +0200, Andi Kleen wrote:
> On Mon, Jul 20, 2009 at 06:12:58PM +0200, Borislav Petkov wrote:
> > Use a weakly defined symbol instead of ugly ifdefs.
> 
> I'm not sure what you're trying to archive, but if you're
> trying to catch corrected MCs you're hooking into the 
> wrong function. print_mce is only called for PCC=1.

Well, I was able to mce-inject a PCC=0 MCE with UC set:

HARDWARE ERROR
CPU 0: Machine Check Exception:                0 Bank 5: b400200000000f0f
TSC a84597c1a0 ADDR 1234 
PROCESSOR 2:100f22 TIME 1248092118 SOCKET 0 APIC 0
MC5_STATUS: Uncorrected error, report: yes, MiscV: invalid, CPU context corrupt: no
 FR Error: CPU Watchdog timer expire.
 Transaction type: Generic(Generic), Timed out, Cache Level: L3/Generic, generic
This is not a software problem!

Irrespective, I'm more focused on decoding all MCEs that are graded to
be output, no matter the severity and obviate the staring and meditating
on MC5_STATUS (0xb400200000000f0f) for example while trying to decipher
what kind of error it was. Long term, we'd like to do more decoding
depending on the error type and use EDAC for that.

> Also if you're checking for specific banks you
> need to check for vendor/cpu model first of course.
> In your current implementation e.g. a Intel CPU
> would pass some random event into your AMD specific code,
> which is probably not intended and might even crash.

Actually I wanted to worry about that only after we have more than one
vendor-specific MCE decoders :).
 
> It would be probably cleaner if you defined a standard
> notifier chain interface.

Sounds like a cleaner solution, at a first glance. Will look into it.

Thanks.

-- 
Regards/Gruss,
Boris.

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