linux-kernel - Re: Do cpu-endian MMIO accessors exist?

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Message-ID: <4A66BEAD.3080404@gmail.com>
Date:	Wed, 22 Jul 2009 09:24:29 +0200
From:	Jiri Slaby <jirislaby@...il.com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	Pekka Paalanen <pq@....fi>, linux-kernel@...r.kernel.org,
	Christoph Hellwig <hch@...radead.org>, lethal@...ux-sh.org,
	linux-sh@...r.kernel.org
Subject: Re: Do cpu-endian MMIO accessors exist?

On 07/22/2009 12:05 AM, Arnd Bergmann wrote:
> On Tuesday 21 July 2009, Jiri Slaby wrote:
>> I guess it's a bug that ioread/write* on sh are not with
>> barriers?
> 
> That depends on how that architecture defines its bus interface.
> On many simple architectures, you do not need any synchronization
> operations.

No, I should have written this explicitly. I meant read* have a barrier,
whereas ioread* do not. Similarly for writes. Is this expected?

For example:
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
#define readl(a)       ({ u32 r_ = __raw_readl(a); mb(); r_; })
#define ioread32(a)    __raw_readl(a)
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