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Message-ID: <alpine.BSF.2.00.0908071312030.19226@desktop>
Date:	Fri, 7 Aug 2009 13:23:36 -1000 (HST)
From:	Jeff Roberson <jroberson@...berson.net>
To:	linux-kernel@...r.kernel.org
Subject: Bugs in intel 5400 EDAC driver

Hello,

The i5400 EDAC driver has several bugs with chip-select row computation 
which most likely lead to bugs in detailed error reporting.  Attempts to 
contact the authors have gone mostly unanswered so I am presenting my diff 
here.  I do not subscribe to lkml and would appreciate being kept in the 
cc.

The most egregious problem was miscalculating the addresses of MTR 
registers after register 0 by assuming they are 32bit rather than 16. 
This caused the driver to miss half of the memories.  Most motherboards 
tend to have only 8 dimm slots and not 16, so this may not have been 
noticed before.

Further, the row calculations multiplied the number of dimms several 
times, ultimately ending up with a maximum row of 32.  The chipset only 
supports 4 dimms in each of 4 channels, so csrow could not be higher than 
4 unless you use a row per-rank with dual-rank dimms.  I opted to 
eliminate this behavior as it is confusing to the user and the error 
reporting works by slot and not rank.  This gives a much clearer view of 
memory by slot and channel in /sys.

Thanks,
Jeff
View attachment "edac-5400.diff" of type "TEXT/PLAIN" (5579 bytes)

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