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Message-ID: <d1af83620908110855x75b1e5aeq6d814ca90c49ec22@mail.gmail.com>
Date:	Tue, 11 Aug 2009 12:55:03 -0300
From:	Kevin Winchester <kjwinchester@...il.com>
To:	Borislav Petkov <borislav.petkov@....com>
Cc:	Mikael Pettersson <mikpe@...uu.se>,
	Borislav Petkov <petkovbb@...glemail.com>,
	Ingo Molnar <mingo@...e.hu>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] x86: clear incorrectly forced X86_FEATURE_LAHF_LM flag

2009/8/11 Borislav Petkov <borislav.petkov@....com>:
> On Tue, Aug 11, 2009 at 04:37:56PM +0200, Mikael Pettersson wrote:
>> Since the BIOS apparently wrote some MSR to get LAHF_LM incorrectly
>> reported by CPUID, would it be possible to also correct that MSR so
>> that applications that execute CPUID get the correct feature flags?
>
> That's a good catch, actually. We have to turn off that bit in the cpuid
> leaf too if the CPU doesn't support the instructions so that cpuid info
> is consistent. LAHF/SAHF support in 64bit mode has to be cpuid-checked
> prior to using them so that info has to be correct.
>
> @Kevin: willing to try a patch or two?
>

Sure, I'll give it a try this evening.  I assume that since Erratum 110 says:

--------------------------
Suggested Workaround
For processors which support the feature (as determined by the
processor revision ID), BIOS should
write a one to:
• MSR C001_100Dh, bit 32 for revision D silicon.
• MSR C001_1005h, bit 32 for revision E and later silicon.
This will cause the extended feature flag in ECX[0] to be set.
--------------------------

That writing a zero to those same MSRs would clear the feature flag?

-- 
Kevin Winchester
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