linux-kernel - Re: [tip:x86/urgent] x86, AMD: Disable wrongly set X86_FEATURE_LAHF

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Date:	Sun, 16 Aug 2009 17:10:27 -0300
From:	Kevin Winchester <kjwinchester@...il.com>
To:	Ingo Molnar <mingo@...e.hu>
CC:	mingo@...hat.com, hpa@...or.com, linux-kernel@...r.kernel.org,
	tglx@...utronix.de, borislav.petkov@....com,
	linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/urgent] x86, AMD: Disable wrongly set X86_FEATURE_LAHF_LM
 CPUID bit

Ingo Molnar wrote:
> * tip-bot for Borislav Petkov <borislav.petkov@....com> wrote:
> 
>> Commit-ID:  c74cb13b94118ec89e48849806356b67caa5ff86
>> Gitweb:     http://git.kernel.org/tip/c74cb13b94118ec89e48849806356b67caa5ff86
>> Author:     Borislav Petkov <borislav.petkov@....com>
>> AuthorDate: Fri, 14 Aug 2009 14:06:34 +0200
>> Committer:  Ingo Molnar <mingo@...e.hu>
>> CommitDate: Sat, 15 Aug 2009 18:43:59 +0200
>>
>> x86, AMD: Disable wrongly set X86_FEATURE_LAHF_LM CPUID bit
>>
>> fbd8b1819e80ac5a176d085fdddc3a34d1499318 turns off the bit for
>> /proc/cpuinfo. However, a proper/full fix would be to additionally
>> turn off the bit in the CPUID output so that future callers get
>> correct CPU features info.
>>
>> Do that by basically reversing what the BIOS wrongfully does at boot.
>>
>> Tested-by: Kevin Winchester <kjwinchester@...il.com>
>> Signed-off-by: Borislav Petkov <borislav.petkov@....com>
>> Cc: kjwinchester@...il.com
>> Cc: mikpe@...uu.se
>> Cc: brgerst@...il.com
>> LKML-Reference: <1250251594-8348-2-git-send-email-borislav.petkov@....com>
>> Signed-off-by: Ingo Molnar <mingo@...e.hu>
>>
>>
>> ---
>>  arch/x86/kernel/cpu/amd.c |   12 +++++++++++-
>>  1 files changed, 11 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
>> index 63fddcd..0ee63dd 100644
>> --- a/arch/x86/kernel/cpu/amd.c
>> +++ b/arch/x86/kernel/cpu/amd.c
>> @@ -404,9 +404,19 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
>>  		/*
>>  		 * Some BIOSes incorrectly force this feature, but only K8
>>  		 * revision D (model = 0x14) and later actually support it.
>> +		 * (AMD Erratum #110, docId: 25759).
>>  		 */
>> -		if (c->x86_model < 0x14)
>> +		if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) {
>> +			u64 val;
>> +
>>  			clear_cpu_cap(c, X86_FEATURE_LAHF_LM);
>> +			if (!rdmsrl_amd_safe(0xc001100d, &val)) {
>> +				val &= ~(1ULL << 32);
>> +				wrmsr_amd_safe(0xc001100d, (u32) val,
>> +							   (u32)(val >> 32));
>> +			}
>> +		}
>> +
>>  	}
>>  	if (c->x86 == 0x10 || c->x86 == 0x11)
>>  		set_cpu_cap(c, X86_FEATURE_REP_GOOD);
> 
> -tip testing found this build bug caused by this patch:
> 
> arch/x86/kernel/cpu/amd.c: In function ‘init_amd’:
> arch/x86/kernel/cpu/amd.c:417: error: implicit declaration of function ‘wrmsr_amd_safe’
> 

I didn't see a notification that patch 1/2:

 x86, msr: Add a AMD wrmsr with exception handling

got applied before this patch.  That could be the cause of this failure.

-- 
Kevin Winchester

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