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Message-ID: <alpine.DEB.1.10.0909011440210.12112@V090114053VZO-1>
Date: Tue, 1 Sep 2009 14:42:29 -0400 (EDT)
From: Christoph Lameter <cl@...ux-foundation.org>
To: Roland Dreier <rdreier@...co.com>
cc: Thomas Gleixner <tglx@...utronix.de>,
Gregory Haskins <ghaskins@...ell.com>,
Rik van Riel <riel@...hat.com>,
Chris Friesen <cfriesen@...tel.com>,
raz ben yehuda <raziebe@...il.com>,
Andrew Morton <akpm@...ux-foundation.org>, mingo@...e.hu,
peterz@...radead.org, maximlevitsky@...il.com, efault@....de,
wiseman@...s.biu.ac.il, linux-kernel@...r.kernel.org,
linux-rt-users@...r.kernel.org
Subject: Re: RFC: THE OFFLINE SCHEDULER
On Mon, 31 Aug 2009, Roland Dreier wrote:
>
> > Some devices now have per cpu threads. See f.e. Mellanox IB drivers. Maybe
> > there is a way to restrict that.
>
> AFAIK the Mellanox drivers just create a single-threaded workqueue.
Ok then these per cpu irqs are there to support something different? There
are per cpu irqs here. Seems to be hardware supported?
62: 13824 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-0
63: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-1
64: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-2
65: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-3
66: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-4
67: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-5
68: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-6
69: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-7
70: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-8
71: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-9
72: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-10
73: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-11
74: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-12
75: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-13
76: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-14
77: 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-comp-15
78: 3225 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge mlx4-async
79: 1832 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-0
80: 5546 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-1
81: 2604 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-2
82: 124 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-3
83: 743126 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-4
84: 857 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-5
85: 321 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-6
86: 2296 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 IR-PCI-MSI-edge eth0-7
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