[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20090910222400.GB26587@Chamillionaire.breakpoint.cc>
Date: Fri, 11 Sep 2009 00:24:00 +0200
From: Sebastian Andrzej Siewior <sebastian@...akpoint.cc>
To: Scott Wood <scottwood@...escale.com>
Cc: linuxppc-dev@...abs.org, Alemao <xcarandiru@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: MPC85xx External/Internal Interrupts
* Sebastian Andrzej Siewior | 2009-09-10 15:15:44 [+0200]:
>* Scott Wood | 2009-09-09 13:28:57 [-0500]:
>
>>> That's why you always have an offset of 16 between every internal
>>> interupt source number in the MPC855ERM document and those weired
>>> numbers in the device tree :)
>>
>>something in the dts bindings that explains it. Am I correct in assuming
>>that this particular internal/external split is Freescale-specific and
>>not a general OpenPIC thing?
>Yes it looks like this.
>manual for both of them to check. I also don't have an OpenPIC spec to
>check there.
I had to say this. Now I got one. According to the OpenPIC there is no
such thing as an internal and external interrupt sources. Base + 0x10000
is the first interrupt source register and the number of interrupt
sources is specified in the feature register.
So the split is a FSL thing.
What do you thing about making this clear? Adding into every .dts a
comment right on top or maybe in
Documentation/powerpc/dts-bindings/fsl/?
>>
>>-Scott
Sebastian
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists