linux-kernel - [PATCH v2] arm: remove unused code in delay.S

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Message-Id: <1253222978.3273.236.camel@linux-1lbu>
Date:	Thu, 17 Sep 2009 16:29:38 -0500
From:	Steve Chen <schen@...sta.com>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Sergei Shtylyov <sshtylyov@...mvista.com>,
	Krzysztof Halasa <khc@...waw.pl>,
	Felipe Contreras <felipe.contreras@...il.com>,
	linux-kernel@...r.kernel.org, Marek Vasut <marek.vasut@...il.com>,
	Pavel Machek <pavel@....cz>,
	linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v2] arm: remove unused code in delay.S

Document #if 0 code block in delay.S and make it selectable for compile.

Signed-off-by: Steve Chen <schen@...sta.com>

---

 arch/arm/Kconfig     |   14 ++++++++++++++
 arch/arm/lib/delay.S |    2 +-
 2 files changed, 15 insertions(+), 1 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aef63c8..ed8bf14 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -813,6 +813,20 @@ config ARM_ERRATA_460075
 	  ACTLR register. Note that setting specific bits in the ACTLR
register
 	  may not be available in non-secure mode.
 
+config OLD_CPU_DELAY
+	depends on CPU_32v3 || CPU_32v4 || CPU_32v4T
+	bool "Different delay() code for some older CPUs"
+	def_bool n
+	help
+	  Enable this if observing longer than expected delays.  This code
+	  improves delay accuracy for some CPUs.  However, it can also cause
+	  delay duration to be too short for others which leads to stability
+	  issues.
+
+	  In other words, do not enable unless you can guarantee that the
+	  processor (or ALL of the processors if building a generic kernel)
+	  delays for at least the time requested after enabling.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 8d6a876..67e679b 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -42,7 +42,7 @@ ENTRY(__const_udelay)				@ 0 <= r0 <= 0x7fffff06
 @ Delay routine
 ENTRY(__delay)
 		subs	r0, r0, #1
-#if 0
+#ifdef CONFIG_OLD_CPU_DELAY
 		movls	pc, lr
 		subs	r0, r0, #1
 		movls	pc, lr


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