| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20090922211101.076e9763@infradead.org> Date: Tue, 22 Sep 2009 21:11:01 +0200 From: Arjan van de Ven <arjan@...radead.org> To: gabe@...ckfam.net Cc: gabebblack@...il.com, linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, jbarnes@...tuousgeek.org Subject: Re: TI PCIe-PCI bridge quirks On Tue, 22 Sep 2009 14:01:06 -0500 Gabe Black <gabebblack@...il.com> wrote: > Hi, > > The TI XIO2000A/XIO2200A PCIe-PCI bridge (VID: 104C, DID: 8231) > erroneously handles fast back-to-back transfers on its subordinate bus > segment. The behavior is seen when there are multiple devices > downstream and transfers from both devices result in a fast b2b > transfer. This confuses the PCIe-PCI bridge and results in data > corruption. > > One way to work around the buggy bridge would be to disable fast b2b > transfers on any device on the subordinate bus-segment by writing the > appropriate bits in the device's pci-configspace command register. > > Are there any suggestions on how this might be handled? Should this > be addressed in the kernel? sounds like this is worth a PCI quirk in the kernel... -- Arjan van de Ven Intel Open Source Technology Centre For development, discussion and tips for power savings, visit http://www.lesswatts.org -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists