lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20091001074630.GA6738@elte.hu>
Date:	Thu, 1 Oct 2009 09:46:30 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Russ Anderson <rja@....com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Frédéric Weisbecker <fweisbec@...il.com>,
	Steven Rostedt <rostedt@...dmis.org>
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com,
	Cliff Wickman <cpw@....com>
Subject: Re: [PATCH 2/2] x86: UV hardware performance counter and topology
	access


* Russ Anderson <rja@....com> wrote:

> Adds device named "/dev/uv_hwperf" that supports an ioctl interface
> to call down into BIOS to read/write memory mapped performance
> monitoring registers.

That's not acceptable - please integrate this with perf events properly. 
See arch/x86/kernel/cpu/perf_event.c for details.

Precisely what kinds of events are being exposed by the UV BIOS 
interface? Also, how does the BIOS get them? The BIOS should be left out 
of that - the PMU driver should know about and access hardware registers 
directly.

If any of this needs enhancements in kernel/perf_event.c we'll be glad 
to help out.

	Ingo
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ