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Message-ID: <BAY105-W49B4F8CFD160524E8855A6C3D10@phx.gbl>
Date:	Fri, 2 Oct 2009 23:51:08 -0700
From:	Yuhong Bao <yuhongbao_386@...mail.com>
To:	<andi@...stfloor.org>
CC:	<macro@...ux-mips.org>, <mingo@...e.hu>, <tglx@...utronix.de>,
	<linux-kernel@...r.kernel.org>
Subject: RE: I/O APIC: Timer through 8259A revamp


 <20090423180419.GT13896@....firstfloor.org>
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> On Thu=2C Apr 23=2C 2009 at 10:45:03AM -0700=2C yuhong wrote:
>>>  The new burst of breakage came with the invention of ACPI and its tabl=
es
>>> for interrupt routing for the APIC.
>> Yep=2C when NVIDIA and ATI entered the chipset market=2C who would have
>> predicted that it would cause more 8254 and APIC related troubles? Or
>> it would be years before it were finally fixed properly? Even worse=2C
>> ATI made chipsets before AMD and Intel introduced their 64-bit CPUs=2C
>> yet it was the x86-64 architecture where the attempts to fix the ATI
>> APIC 8254 timer issues were going to. Only later when it was finally
>> fixed properly was it backported to x86.
>
> I'm not sure what you mean here. The ATI timer fixes were done
> on both i386 and x86-64.

But why did it took so long to finally fix this when ATI has been making ch=
ipsets since 2001?
Even worse=2C why was the attempts to fix this issue going to the x86-64 br=
anch when ATI was making chipsets before the AMD Athlon 64 was even release=
d?

Yuhong Bao
 		 	   		  =0A=
_________________________________________________________________=0A=
Hotmail: Trusted email with powerful SPAM protection.=0A=
http://clk.atdmt.com/GBL/go/177141665/direct/01/=
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