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Date:	Tue, 06 Oct 2009 21:54:38 -0400
From:	Steven Rostedt <rostedt@...dmis.org>
To:	Mathieu Desnoyers <mathieu.desnoyers@...ymtl.ca>
Cc:	Ingo Molnar <mingo@...e.hu>, Jason Baron <jbaron@...hat.com>,
	linux-kernel@...r.kernel.org, tglx@...utronix.de, ak@...e.de,
	roland@...hat.com, rth@...hat.com, mhiramat@...hat.com
Subject: Re: [PATCH 1/4] jump label - make init_kernel_text() global

On Sat, 2009-10-03 at 08:39 -0400, Mathieu Desnoyers wrote:

> I might be missing a bit of context here, I just want to make sure we
> are on the same page: patching a jmp instruction is safe on UP, safe
> with stop_machine(), is very likely safe with the breakpoint-ipi

Hi Mathieu,

I've been reading through these threads (both this one and the immediate
one) and I'm still a bit confused. I really want to understand this in a
simple way, thus make sure everyone else understands it too.

>>From what Arjan said here:

  http://lkml.org/lkml/2009/9/25/98

The issue is going back from the int3 to the old value. How does the
breakpoint-ipi work?

Supposedly, we can add an int3 to the code without any worry. If another
CPU at that same time hits that code path, it will either run the old
code, or take the interrupt. The breakpoint interrupt handler, will
handle that code path, and the execution continues.

Now what is the issues with removing the int3 and placing back the old
(or new) value. Is there an issue if another CPU is about to execute
that code path as we remove the int3? If so, how does sending an IPI
help the matter without adding more races?

Is there only an issue if we change the old value with something else,
and you just need to send the IPI after you modify the old code and
before removing the int3?

I may just be totally confused, which I usually am. But when I'm not
confused, I feel that the code is practical ;-)

-- Steve

 

> approach (but we need the confirmation from Intel, which hpa is trying
> to get), but is definitely _not_ safe if neither of these methods are
> used on a SMP system. If a non-aligned multi-word jump is modified while
> another CPU is fetching the instruction, bad things could happen.


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