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Message-ID: <b637ec0b0910131303p2aecacf7x860b2c46919db45a@mail.gmail.com>
Date: Tue, 13 Oct 2009 22:03:14 +0200
From: Fabio Comolli <fabio.comolli@...il.com>
To: Jesse Barnes <jbarnes@...tuousgeek.org>
Cc: "Carlos R. Mafra" <crmafra2@...il.com>,
Theodore Tso <tytso@....edu>, Eric Anholt <eric@...olt.net>,
linux-kernel@...r.kernel.org, Keith Packard <keithp@...thp.com>
Subject: Re: 2.6.32 regression (bisected): Video tearing/glitching with T400
laptops
Hi.
On Tue, Oct 13, 2009 at 9:25 PM, Jesse Barnes <jbarnes@...tuousgeek.org> wrote:
> The patch below should have only affected GM45 chipsets, what chipset
> do you have (lspci -vvv -s 02.0 should tell you).
>
Very strange because it's a 915:
00:02.0 VGA compatible controller: Intel Corporation Mobile
915GM/GMS/910GML Express Graphics Controller (rev 04) (prog-if 00 [VGA
controller])
Subsystem: ASUSTeK Computer Inc. Device 82d9
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at f7f00000 (32-bit, non-prefetchable) [size=512K]
Region 1: I/O ports at ec00 [size=8]
Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M]
Region 3: Memory at f7ec0000 (32-bit, non-prefetchable) [size=256K]
Expansion ROM at <unassigned> [disabled]
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: i915
> Sounds like this patch was good enough for both you and Carlos, but not
> sufficient for Ted or Keith. What resolution are you running?
It's an Asus eeePC 900 @ 1024x600
BTW, the patch really helps, usually I experienced problems after 3/4
minutes of work and sometimes I couldn't recover form the blank
screen. Now it's more than 1h 30' I'm at the laptop and everything is
perfect.
>
> Jesse
>
Regards,
Fabio
> On Tue, 13 Oct 2009 21:19:32 +0200
> Fabio Comolli <fabio.comolli@...il.com> wrote:
>
>> Hi Jesse.
>> Sorry to jump in but I also had issues with -32rc (i915 chip) and this
>> patch seems to have resolved all problems.
>>
>> I don't know how to describe in english what happened to my desktop
>> but probably "glitches" and "tearings" could be the correct words.
>> Also sometimes the screen went blank and needed to switch to terminal
>> console and back to return to the normal X screen.
>>
>> Nothing in the logs, neither messages nor Xorg.0.log.
>>
>> Regards,
>> Fabio
>>
>>
>>
>> On Mon, Oct 12, 2009 at 9:05 PM, Jesse Barnes
>> <jbarnes@...tuousgeek.org> wrote:
>> > On Mon, 12 Oct 2009 20:46:51 +0200
>> > "Carlos R. Mafra" <crmafra2@...il.com> wrote:
>> >
>> >> On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
>> >> > >
>> >> > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
>> >> > > still getting huge amounts of glitching and tearing with this
>> >> > > patch applied against -rc3.
>> >> > >
>> >> > > What I'm using for now to fix up my system is this patch.
>> >> > >
>> >> >
>> >> > How about this one? I have one more idea to try out if this
>> >> > doesn't work (hacking on it now).
>> >>
>> >> I was also experiencing something very similar to Theodore's bug
>> >> report and, at least for me, the patch below fixed the issue (the
>> >> previous one also had no effect).
>> >
>> > Cool, good to hear. Hopefully Ted and Keith will confirm too.
>> >
>> > --
>> > Jesse Barnes, Intel Open Source Technology Center
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_display.c
>> > b/drivers/gpu/drm/i915/intel_display.c index 7a5fb79..1451945 100644
>> > --- a/drivers/gpu/drm/i915/intel_display.c
>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>> > @@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc
>> > *crtc, unsigned long interval) dev_priv->cfb_fence =
>> > obj_priv->fence_reg; dev_priv->cfb_plane = intel_crtc->plane;
>> >
>> > - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
>> > + dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
>> > if (obj_priv->tiling_mode != I915_TILING_NONE) {
>> > dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
>> > I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
>> > --
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>> >
>>
>
>
> --
> Jesse Barnes, Intel Open Source Technology Center
>
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