linux-kernel - Re: [PATCH] [ARM] force dcache flush if dcache

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Message-ID: <20091015214805.GP11702@bombadil.infradead.org>
Date:	Thu, 15 Oct 2009 17:48:05 -0400
From:	Kyle McMartin <kyle@...artin.ca>
To:	Hugh Dickins <hugh.dickins@...cali.co.uk>
Cc:	Russell King <rmk+lkml@....linux.org.uk>,
	David Miller <davem@...emloft.net>,
	Nitin Gupta <ngupta@...are.org>, Nick Piggin <npiggin@...e.de>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Kyle McMartin <kyle@...artin.ca>,
	Paul Mundt <lethal@...hal-sh.org>,
	Chen Liqin <liqin.chen@...plusct.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-arch@...r.kernel.org, James.Bottomley@...senPartnership.com
Subject: Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set

On Mon, Oct 12, 2009 at 07:06:04PM +0100, Hugh Dickins wrote:
> The architectures which appear to need fixing in the same way are
> arm, mips, parisc, sh and sparc64 (xtensa looks right already, and
> score just looks confused - a whole function __update_cache() which
> checks for PG_arch_1, yet nothing sets it?).
> 

parisc looks affected as well, though I don't recall the semantics of
dcache flushing without a mapping. James, can you send a patch?

WRT score, which seems to have been mostly cobbled together as a modern
copy of mips, it can likely be eliminated entirely, as it looks to have
been cargoculted from mips without thought.

regards, Kyle
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