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Message-ID: <20091016123853.GA15393@elte.hu>
Date:	Fri, 16 Oct 2009 14:38:53 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Andreas Herrmann <herrmann.der.user@...glemail.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
	Yinghai Lu <yinghai@...nel.org>
Subject: Re: x86, amd: Get multi-node CPU info from NodeId MSR instead of
	PCI config space


* Andreas Herrmann <herrmann.der.user@...glemail.com> wrote:

> Use newly introduced NodeId MSR to get NodeId and number of nodes per 
> processor.

What will happen on CPUs that dont have this MSR and got this info from 
the PCI config space:

>  static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c)
>  {
> -#ifdef CONFIG_PCI
> -	u32 t, cpn;
> -	u8 n, n_id;
>  	int cpu = smp_processor_id();
>  
>  	/* fixup topology information only once for a core */
>  	if (cpu_has(c, X86_FEATURE_AMD_DCM))
>  		return;
>  
> -	/* check for multi-node processor on boot cpu */
> -	t = read_pci_config(0, 24, 3, 0xe8);
> -	if (!(t & (1 << 29)))
>  		return;
>  
>  	set_cpu_cap(c, X86_FEATURE_AMD_DCM);

are there any such CPUs? I.e. we want to know the effect of this patch 
on various models of AMD CPUs - is the change really .32 safe? Does it 
solve any problem that makes it .32 material versus being for .33?

	Ingo
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