lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Mon, 26 Oct 2009 13:39:34 -0700
From:	Jesse Barnes <>
To:	Dave Jones <>
Cc:	Linux Kernel <>
Subject: Re: [X86] PCI: Use generic cacheline sizing instead of per-vendor

On Wed, 14 Oct 2009 16:31:39 -0400
Dave Jones <> wrote:

> Instead of the PCI code needing to have code to determine the 
> cacheline size of each processor, use the data the cpu identification
> code should have already determined during early boot.
> (The vendor checks are also incomplete, and don't take into account
>  modern CPUs)
> I've been carrying a variant of this code in Fedora for a while,
> that prints debug information.  There are a number of cases where we
> are currently setting the PCI cacheline size to 32 bytes, when the CPU
> cacheline size is 64 bytes.  With this patch, we set them both the
> same.
> Signed-off-by: Dave Jones <>

Applied this; had to fix up a few conflicts due to Tejun's recent CLS
improvements though...

Jesse Barnes, Intel Open Source Technology Center
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

Powered by blists - more mailing lists